发明名称 PREVENSION SYSTEM FOR INEFFECTIVE PACKET STORAGE
摘要 <p>PURPOSE:To detect and releace the ineffective pending of a memory for packet storage and to prevent an evil influence excerting upon communication, by providing said memory in a communication controller with a means, etc. of releasing a packet which is staying for a certain time or longer. CONSTITUTION:When a communication controller CCE receives packets from a circuit to store some of them in a memory PM for packet storage, a buffer-free control part BFC writes a specified value in the timer control area in a buffer- free control memory BFM, and further writes a sequence number in the sequence number storage area. Then, the CCE transfers the remaining packets to a CPU to inform the CPU of the packet reception. The BFC subtracts a specified value from the value in the timer control area in the BFM at intervals of specified timing, and informs the CPU of the PM address where the subtraction result reaches zero. When a main storage device has no packets to be coupled with a packet in the PM with the 0 timer value, the CPU instructs the BFC to release the PM from the CCE.</p>
申请公布号 JPS5813048(A) 申请公布日期 1983.01.25
申请号 JP19810111804 申请日期 1981.07.17
申请人 NIPPON DENSHIN DENWA KOSHA 发明人 YOMO YOSHIAKI;YOSHIE KINZABUROU;TAKAGI IWAO
分类号 H04L12/56 主分类号 H04L12/56
代理机构 代理人
主权项
地址