| 摘要 |
A signal to be analysed is fed from input terminal 1 to analog-digital converter 6. The resulting digital signal is fed in parallel to digital low- (or high-) pass filters 16 to 22. The outputs of filters 16 to 22 are fed to square circuits 23-1 to 23-7. Subtraction circuits 24-1 to 24-6 receive the outputs of respective pairs of square circuits (e.g. subtraction circuit 24-1 receives the outputs of square circuits 23-1, 23-2, and subtraction circuit 24-2 receives the outputs of square circuits 23-2, 23-3).
<??>The subtraction circuits 24-1 to 24-6 derive differences between the outputs of the pairs of square circuits to which they are connected. The differences are fed to accumulators 25-1 to 25-6 which accumulate received differences over a period of time then output accumulated values. The output accuulated values give indications of power levels in different frequency bands of the signal to be analyzed over the period of time concerned. |
