| 摘要 |
<p>PURPOSE:To prevent the ineffective pending of the PM (packet storage memory) of a stand-by system CCE (communication controller) by allowing an interruption from the CCE to a CPU after confirming that packets are transferred normally from the CCE to the PM. CONSTITUTION:On receiving packets from a circuit, a CCE stores some of them in a PM and also transfers the remainder to a CPU, which is then informed of the reception together with PM addresses wherein the packets are stored. The CPU receives the packet reception report from the CCE to confirm that packets are stored in an MM (main memory), and then instructs a PWC (PM storage control part) to store the packets from the stand-by system CCE in the PM. The PWC transfers the packets stored in its own PM to the PM of the stand-by system CCE. After confirming that the transfer is carried out normally, the CCE causes an interruption to the CPU, thereby informing the CPU that the transfer to the PM of the stand-by system CCE ends.</p> |
