发明名称 INFORMATION PROCESSOR
摘要 PURPOSE:To perform information processing in a high speed, by providing a firmware storage circuit storing a specific address in an information proessor. CONSTITUTION:A control table and a machine language program are stored in a main storage device 401 and a head address and a program start address of the table in the device 401 are stored in a firmware storage circuit (FS)410. An instruction controlling readout storage of the device 401 is stored in a microinstruction memory 404 and the instruction read out from the memory 404 is set to a register (CSDR)405. An instruction from the CSDR 405 is decoded at decoders 406 and 417 and outputs a signal controlling a main storage address register 407, a main storage data register 408, a main storage write register 409, an FS 410, selectors 414 and 443, a main storage control circuit 440 and an arithmetic logical operation circuit 416. To access the FS 410 with a microinstruction, the deficiency of performance due to repetitive readout of the same data from the main storage can be prevented, the effect of the firmware can be given and high speed processing can be obtained.
申请公布号 JPS5812052(A) 申请公布日期 1983.01.24
申请号 JP19810109343 申请日期 1981.07.15
申请人 HITACHI SEISAKUSHO KK 发明人 TSUJIOKA SHIGEO;ADACHI SHIGEMI;TOYOIZUMI YASUMITSU;JINNAI TOSHIROU
分类号 G06F9/22;G06F9/32 主分类号 G06F9/22
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