| 摘要 |
PURPOSE:To increase the density of integration, to reduce the collector series resistance of the high pipolar element and to increase the saturated output voltage of the transistor for the titled device by a method wherein an N<+> buried layer is buried only at the part directly below the shallow N<+> region on the bipolar element section. CONSTITUTION:The most important contribution of this invention is that the interval of patterns between an N<+> region 33 and the P<+> region of a double- base region 30 can be greatly reduced because the relatively shallow N<+> region 33 can be used in an I<2>L element 21 section. The N<+> region 33 to be used as a guard ring is known for its excellent characteristics when three sides of the base of an N-P-N transistor 23 are surrounded by the region. At this time, the pitch of a plurality of I<2>L elements 21 formed in a line is reduced by 14-16mum per element, and the density of integration can be improved remarkably. |
