发明名称 INPUT AND OUTPUT PROCESSOR
摘要 PURPOSE:To improve the processing ability, by making the connection of a plurality of different input and output devices having a wide variety of data transfer speed possible through the provision of a plurality of host device connecting sections to the input and output processors. CONSTITUTION:When a microprocessor 22 of an input and output processor 2 receives an input/output operation instruction to an input/output device 5, control is given to a microprogram C and the processing is started. At writing, initial set is performed for the preparation of transfer. The program C requests the start of readout to a processor 1. The transfer between the processor 1 and the device 5 can automatically be executed afterward. After the end of transfer, the conversation sequence is started and the data of the processor 1 is set into a connection section 20. An input/output device connection section 29 transmits the data to a control circuit 27, requests the next data transfer and this action is repeated. The same holds for readout from the device 5. The data transfer of each input and output device can simultaneously be executed and controlled and the priority is, in this example, in the order of the devices 5, 4 and 3.
申请公布号 JPS5810228(A) 申请公布日期 1983.01.20
申请号 JP19810108958 申请日期 1981.07.13
申请人 NIPPON DENKI KK 发明人 AKIMOTO KENJI
分类号 G06F13/28;G06F13/12 主分类号 G06F13/28
代理机构 代理人
主权项
地址