发明名称 MEANS AND METHOD FOR DISABLING ACCESS TO A MEMORY
摘要 <p>An integrated circuit chip (13) having a digital memory wherein direct access to at least a portion of the memory is prevented. Contact pads (16, 17, 18) having coupling lines (19, 20, 21) to couple the contact pads (16, 17, 18) to the memory bus are provided. A security code can be programmed into a portion of the memory during wafer probe and test. When the integrated circuit chip (13) is removed from the wafer (10) the coupling lines (19, 20, 21) between the contact pads (16, 17, 18) and the memory bus are destroyed since the coupling lines (19, 20, 21) are made to extend off of the chip (13).</p>
申请公布号 WO1983000244(A1) 申请公布日期 1983.01.20
申请号 US1982000803 申请日期 1982.06.14
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