| 摘要 |
PURPOSE:To output the signals of desired amplitude and bias by a method wherein output of the K-th stage collector of an N-stage I<2>L is inputted in the base of an N-P-N transistor with a resistor connected across the emitter and collector thereof and the emitter is connected to the ground of the K-th stage of I<2>L to maintain the emitter potentially same as the ground. CONSTITUTION:The second stage I<2>L is constituted of an I<2>L section output terminal 1, a constant current source 2, a transistor Q3, an N-P-N transistor Q4, a P-N-P type transistor Q5, resistors R5-R8, constant voltage sources V2 and V3, an interface section output terminal 3, an output terminal 4 of the first stage I<2>L, an N-P-N transistor Q6, a P-N-P transistor Q7, etc. Next, the first stage I<2>L is constituted in the same way, and the transistors Q6 and Q7 respectively of the second and first stages are interconnected in a multistage structure. The output from each of the stages is converted into a signal of desired amplitude and bias, and is supplied to the linear element. |
