发明名称 Video signal processing circuit
摘要 A video signal processing circuit for an input video signal having a DC level, a pedestal level, and a blanking period, includes a first clamp circuit for clamping the pedestal level of the input video signal to a first predetermined DC level in response to a clamp voltage supplied from a clamp voltage source, a blanking circuit for setting the level of the input video signal to a second predetermined DC level which is higher than the pedestal level of the input video signal during the blanking period of the input video signal and for producing a wave-formed signal, a peak-hold circuit for detecting and holding the darkest level of the wave-formed signal and for producing a peak-held signal, a series circuit of a diode and resistor, which produces a threshold level signal, connected between the first clamp circuit and the output of the peak-held circuit, a comparator circuit supplied at one input with the lower of the threshold level signal and the peak-held signal and supplied at another input with the output from the first clamp circuit for comparing the signals supplied thereto and for producing an output signal corresponding to the higher one of the compared signals, and an average picture level detecting circuit including a variable impedance element connected to the resistor for increasing the threshold level signal in response to increases in the average picture level of the input video signal.
申请公布号 US4369466(A) 申请公布日期 1983.01.18
申请号 US19800209023 申请日期 1980.11.21
申请人 SONY CORPORATION 发明人 MATSUZAKI, ATSUSHI;KAWAMATA, MITSUO
分类号 H04N5/16;H04N5/18;(IPC1-7):H04N5/16 主分类号 H04N5/16
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