发明名称 FINAL VALUE FORECASTING CIRCUIT
摘要 PURPOSE:To apply the circuit for a measuring signal in which the time constant of the 1st order time lag is fluctuated, by feedback-controlling the time constant so that an output signal time change can be zeroed based on the output signal of the 1st order time lead circuit in which the time constant can be variable. CONSTITUTION:A measuring signal x(t) is inputted to a 1st order time lead circuit 1 and converted to a forecasting final value and outputted. An output signal of the circuit 1 is differentiated at a differentiation circuit 2 and inputted to an amplifying circuit 3. The circuit 3 controls the time constant of the circuit 1 with the amplified output signal. In this circuit system, an input signal of the circuit 3 when a control loop is balanced is a minimum value. Since the gain of the circuit 3 is suficiently high, the input signal can actually be regarded zero. This means that the output signal of the circuit is cannot be changed with time. Thus, the output signal of the circuit 1 at balancing state is coincident with the final value of the signal x(t). That is, the forecasting value for the final value can be obtained.
申请公布号 JPS588302(A) 申请公布日期 1983.01.18
申请号 JP19810105322 申请日期 1981.07.06
申请人 YOKOGAWA DENKI SEISAKUSHO KK 发明人 INAO KIYOHARU
分类号 G05B11/36;G05B13/02 主分类号 G05B11/36
代理机构 代理人
主权项
地址