| 摘要 |
PURPOSE:To obtain high sensitivity, high dV/dt withstand voltage at a PNPN semiconductor switch by a method wherein the N type conductive resistor region is formed in the P type gate region under a gate electrode of MOSFET structural body and moreover as to connect between the drain region and the region to be used both as cathode and source. CONSTITUTION:A P type diffusion layer 18 to be used as the anode region, a P type diffusion layer 19 to be used as the P type gate region are formed in the surface of an N type semiconductor substrate 17. An N type diffusion layer 20 to be used as the cathode region and as the source region of the MOSFET, and an N type diffusion layer 21 to be used as the drain region are formed in the layer 19. A polycrystalline silicon electrode 25 and an N type polycrystalline silicon electrode 25 are arranged as the gate electrodes. The fine stripe N type conductive resistor region 31 is provided in the surface of the P type diffusion layer 19 between the N type diffusion layers 20, 21 under the polycrystalline silicon electrode 25 and quite at a part of the region directly under the first gate insulating layer 24 as to connect electrically between the layers 20, 21 through high resistance. |
