发明名称 OUTPUT CIRCUIT
摘要 PURPOSE:To eliminate the need for a switching input terminal for outputting two kind of signals by detecting variation in the output level of a bias circuit which applies a bias to an output terminal, and then selecting one of the 1st and 2nd input. CONSTITUTION:When an output terminal 18 is placed not in a pull-up state, but in an open state by a resistance, transistor (TR) turn on and a gate 36 generates an L-level output. When a control signal input terminal 13 is held at a level H, a gate 43 is closed to turn off a TR17, and the output terminal 18 is held at a level (Vcc/2) level obtained by dividing a power voltage Vcc through resistances 21 and 22. At this time, a flip-flop FF41 reads the level L by a clock from a terminal 42 to open a gate 15, and the input signal to a terminal 12 is selected. When the terminal is placed in the pull-up state by the resistance 20, the TR27 turns off and the FF41 reads the level H by the clock from the terminal 42 to open a gate 14, thereby selecting the input signal to the terminal 11.
申请公布号 JPS585025(A) 申请公布日期 1983.01.12
申请号 JP19810102240 申请日期 1981.07.02
申请人 OKI DENKI KOGYO KK 发明人 SHIN YASUHIRO
分类号 H03K5/00;H03K17/00;H03K19/0175;(IPC1-7):03K17/00 主分类号 H03K5/00
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