| 摘要 |
PURPOSE:To reduce the influence of an internal strain produced at the time of sealing an enclosure by arranging a resistance element parallel to a (100) axis on a substrate of (100) plane and arranging a circuit independent to the internal circuit in a peripheral region. CONSTITUTION:A resistance element patternIis arranged parallel to a (100) axis on a semiconductor substrate of (100) plane, and a circuit independent to the internal circuit such as a testing circuit and a checking pad are arranged at the peripheries II, III. In this manner, the variation in the resistance value due to internal strain produced at the time of sealing the enclosure is reduced, thereby raising the integration. |
