发明名称 WAITING TIME CONTROLLING SYSTEM
摘要 PURPOSE:To set a waiting time optionally by an operand value, by subtracting the value of a counter by the value of the operand of a specific instruction when the specific instruction is detected by a decoding circuit and executing the next program when the value of the counter becomes zero. CONSTITUTION:A program fetched from a control storage 2 where microprograms are stored is set to a program register 3; and when an instruction decoding circuit 4 detects a specific instruction in the program from the register 3, the operand part of this instruction is set to a counter 5 through an AND gate. An FF indicating that this specific instruction is executed is set. When the FF is set, an address register 1 for the access to the next instruction is not updated, and a subtracting circuit 7 is operated to count down the counter 5. When the value of the counter 5 becomes zero, the FF is reset, and an address updating circuit 8 is operated, and the register 1 is updated to the address of the next instruction, and the next instruction is fetched.
申请公布号 JPS582947(A) 申请公布日期 1983.01.08
申请号 JP19810101132 申请日期 1981.06.29
申请人 FUJITSU KK 发明人 MORIYOSHI SHIYUUHEI;TANIYAMA YUKIO
分类号 G06F9/22;G06F11/28 主分类号 G06F9/22
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