发明名称 ADDRESS CIRCUIT
摘要 PURPOSE:To simplify the method for loading to an index register, by setting a value, which is obtained by adding contents of lower bits of the index register and a pointer, to an auxiliary index register to perform the address modification of virtual shift. CONSTITUTION:A direct address and the output of a gate 35 are added in an 8-bit adder 33, and upper 4 bits are used as an address output, and the 8-bit output is sent to a selector SL34. The selector SL34 selects either of outputs of a data bus and the adder 33 and sends the selected output to an index register IDR31. The 4 resister IDR31 sends the 8-bit output to a gate 35 and sends lower 4 bits to a selector SL37. The selector SL37 selects lower 4 bits of either of the direct address and the register IDR31 and sends them to a 4-bit adder 38. The adder 38 adds outputs of the selector SL37 and a gate selector 40 and outputs lower 4 bits of the address to a selector SL39. The selector SL39 selects lower 4 bits of either of the bus and the adder 38 and sends them to an auxiliary index register IDR32. The register IDR32 sends the output to a gate 40, and the gate 40 selects outputs of the register IDR32 and a pointer 36 and sends them to the adder 38 to modify the address of virtual shift.
申请公布号 JPS582935(A) 申请公布日期 1983.01.08
申请号 JP19810100538 申请日期 1981.06.30
申请人 FUJITSU KK 发明人 SHIMADA MITSUO;TSUDA TOSHITAKA;MIWA HIROICHI;IMAIDE HIROAKI
分类号 G06F7/00;G06F5/01;G06F7/76;G06F9/34;G06F9/355;G06F12/02;H03H17/02 主分类号 G06F7/00
代理机构 代理人
主权项
地址