发明名称 ASSOCIATIVE PROCESSOR DEVICE
摘要 PURPOSE:To save a data output time, and to improve throughout of the whole device, by controlling an arithmetic operation for a data or an operation of the whole device in accordance with contents of a data itself selected by an associative processing. CONSTITUTION:An arithmetic logical operating block 17 executes an arithmetic logical operation of a part or the whole 20 of a data read out from an associative memory block 14, and an output data of a selector 16. A control block 12 receives a control instruction given to an input terminal 11, and the whole or a part of an output of a register 15, and controls an operation of each block of this device, including the arithmetic logical operating block 17 and the associative memory block 14.
申请公布号 JPS583052(A) 申请公布日期 1983.01.08
申请号 JP19810102033 申请日期 1981.06.30
申请人 NIPPON DENSHIN DENWA KOSHA 发明人 OGURA TAKESHI;NIKAIDOU TADANOBU;MIYAHARA NORIO
分类号 G11C15/04;G06F7/48 主分类号 G11C15/04
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