发明名称 INTERRUPTION CONTROLLING SYSTEM
摘要 PURPOSE:To simplify the control and to prevent the system from being complicated, by generating an interrupt at an optional time to execute a required processing, in the interruption controlling system for the information processing system using a real-time timer. CONSTITUTION:When values set to interrupt time registers 2-4 coincide with the value of a real-time timer 1, interrupt signals are outputted on a basis of contents of corresponding interrupt mask registers 8-10, and contents of registers 11-13 where instruction addresses to be executed next are held are stored in the next instruction address part of a new PSW area 22 for interruption processing on a main storage device, and the new PSW22 is loaded to the PSW of a central processing device, thus executing the interruption processing.
申请公布号 JPS582953(A) 申请公布日期 1983.01.08
申请号 JP19810102064 申请日期 1981.06.29
申请人 NIPPON DENSHIN DENWA KOSHA 发明人 FUKUOKA HIDEKI;TANAKA KIYOTO
分类号 G06F9/48 主分类号 G06F9/48
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