发明名称 MANUFACTURE OF CMOS INTEGRATED CIRCUIT
摘要 PURPOSE:To increase the integration of CMOSIC, to reduce the feedback capacitance and the drain capacitance, and to accomplish the high-speed and low- powered integrated circuit. CONSTITUTION:A polycrystalline Si film, whereon a patterning has been finished, is oxidized by heat by performing ordinary manufacturing process for Si gate MOS. Then, the oxide film 303 on the substrate is removed using an oxide film etching solution. At this time, attention is to be paid that the oxide film 402 of the polycrystalline Si will remain. Then, the second polycrystalline Si film 403 is coated on the whole surface, a patterning is performed on the diffusion region using a diffusion mask 404, and impurities are diffused. After P type impurities and N type impurities have been diffused, the polycrystalline Si is patterned. After the first polycrystalline Si film has been formed as above, a patterning and an oxidation are performed, soaked in an oxide film etching solution for the prescribed period of time, the second polycrystalline Si film is formed, and then the impurities in the second polycrystalline Si film are diffused on the substrate directly.
申请公布号 JPS582062(A) 申请公布日期 1983.01.07
申请号 JP19810100077 申请日期 1981.06.26
申请人 SUWA SEIKOSHA KK 发明人 NAKASAKI YASUTAKA
分类号 H01L27/092;H01L21/66;H01L21/8238;H01L29/78 主分类号 H01L27/092
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