发明名称 |
Arrangement for connecting a memory to a control device |
摘要 |
The connection points of the address (AD) and data lines (DL) of a module of a control device (ST), for example of a microprocessor, are connected to the corresponding terminations of a memory (SP) not on the basis of the value of the individual bit positions but as desired, avoiding the lines crossing over one another. If the memory (SP) is a read only memory, coding of the memory contents is brought about by this type of wiring. <IMAGE>
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申请公布号 |
DE3123620(A1) |
申请公布日期 |
1983.01.05 |
申请号 |
DE19813123620 |
申请日期 |
1981.06.13 |
申请人 |
TELEFONBAU UND NORMALZEIT GMBH |
发明人 |
MOSES,KLAUS,ING.;VOGT,WALTER |
分类号 |
G06F12/14;G06F15/78;G11C5/02;H05K1/18;(IPC1-7):H05K7/06;G06F13/06;G11C17/00 |
主分类号 |
G06F12/14 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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