发明名称 Modular signal-processing system
摘要 A signal-processing system, e.g. for a telephone exchange, comprises n modular processing units each including a pair of identical microprocessors operating in parallel on binary signals arriving over an internal bus, only one microprocessor of each pair being enabled to transmit outgoing messages to that bus while the other operates as a dummy. The two microprocessors are interlinked by a correlating connection enabling verification of their correct operation in response to microinstructions read out from respective microprogram memories thereof under the control of a common clock. A momentary divergence, resulting from a relative lag in the response of one microprocessor to an asynchronously arriving signal bit, results in a delay of the microprogram by one clock cycle to permit resynchronization; longer-lasting disparities lead to a deactivation of the microprocessor pair and to the emission of an alarm signal. Processing information individual to the associated peripheral unit is stored in an internal memory connected to the bus; general information utilizable by any processing unit is stored in several outside memory banks accessible through external extensions of the internal bus of any such unit. The processing units may be hierarchically organized in several tiers of different ranks.
申请公布号 US4366535(A) 申请公布日期 1982.12.28
申请号 US19800111942 申请日期 1980.01.14
申请人 CSELT - CENTRO STUDI E LABORATORI TELECOMUNICAZIONI S.P.A. 发明人 CEDOLIN, RICCARDO;CHIAROTTINO, WOLMER;GIANDONATO, GIUSEPPE;GIORCELLI, SILVANO;MARTINENGO, GIORGIO;SOFI, GIORGIO;VILLONE, SERGIO
分类号 G06F11/16;G06F15/16;G06F15/177;G06F15/80;H04Q3/545;(IPC1-7):G06F11/00;G06F13/00 主分类号 G06F11/16
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