发明名称 NOISE REDUCTION CIRCUIT
摘要 PURPOSE:To accurately hold the phase difference of two video signals, by inserting a variable delay circuit to a path of a video signal, in a device separating and eliminating the noise component through the use of a head reproducing two video signals apart from a multiple of one field period. CONSTITUTION:A main head gap 8a and a sub-head gap 8b are provided, and a video signal almost parted by one field is reproduced, and noise component is picked up by applying the signal in opposite phase to an adder 12 from both the heads after FM demodulation. The noise component picked up from the adder 12 is applied to an adder 13 in opposite phase with an FM demodulation signal and noise component is rejected from the FM demodulation signal. A variable delay circuit consisting of a CCD 19 is inserted to the path of the video signal from the sub-head 8b and a VCO 22 so that the phase difference of both the signals can accurately be held to control clock frequency applied to the CCD 19.
申请公布号 JPS57212884(A) 申请公布日期 1982.12.27
申请号 JP19810098963 申请日期 1981.06.25
申请人 NIPPON VICTOR KK 发明人 HIROTA AKIRA
分类号 H04N5/93;G11B20/06;H04N5/911 主分类号 H04N5/93
代理机构 代理人
主权项
地址