发明名称 MEMORY REFRESHMENT CONTROL SYSTEM
摘要 PURPOSE:To eliminate the need for a priority selecting circuit, a queuing circuit, etc., and to simplify constitution, by controlling the starting and ending of refreshing operation through a clocking device, a refreshment frequency counter, etc. CONSTITUTION:When neither a memory read nor a write instruction for a program is generated, a CPU1 firstly sets a refreshment request generation time and a refreshment frequency in a clocking device 2 and a refreshment frequency counter 3. Then, the starting of the refreshing operation of a memory 5 is controlled through the CPU1, a control circuit 4 for refreshment, etc., in response to the detection of the overflow state of the clocking device 2, and the ending of the refreshing operation is controlled by the counter 3 while the reading and writing operation of the memory 5 is not performed through the CPU1. Therefore, the need for a priority circuit, a queuing circuit, etc., is eliminated to realize a refreshment control system whose constitution is simplified.
申请公布号 JPS57212691(A) 申请公布日期 1982.12.27
申请号 JP19810096705 申请日期 1981.06.24
申请人 HITACHI SEISAKUSHO KK 发明人 TAGUCHI KAZUYOSHI
分类号 G11C11/406 主分类号 G11C11/406
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