发明名称 INSPECTING METHOD FOR PRINTED BOARD
摘要 PURPOSE:To prevent an erroneous decision by measuring an output vector of a circuit terminal, which appears at a timing derived by supplying the same stimulus to a printed board to be tested, comparing it with an output vector from a non-defective printed board, and deciding a non-defective or a defective. CONSTITUTION:By inspecting means 10, 20 of the same constitution, the same stimulus is supplied to a non-defective printed board 14 and a printed board to be tested 24, and output vectors outputted thereby are compared by both of them. When they coincide, the printed board to be tested 24 is decided to be a non-defective, and when they do not coincide, the same inspection is repeated plural times to the non-defective printed board 14, the appearance timing of a semantic output vector is specified by adding an ambiguity (making it have a suitable time width), and when the output vector from the printed board to be tested 24 has appeared at a timing for recognizing its ambiguity, it is decided to be a non-defective. In such a way, the printed board inspection in which an erroneous decision does not occur can be realized.
申请公布号 JPS63211441(A) 申请公布日期 1988.09.02
申请号 JP19870044767 申请日期 1987.02.27
申请人 YOKOGAWA ELECTRIC CORP 发明人 WATABE ICHIU;SAKURAI KAZUAKI
分类号 G06F11/22 主分类号 G06F11/22
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