| 摘要 |
PURPOSE:To reduce variations of memory contents with a substrate voltage, and to pevent the occurrence of malfunction, by providing intermediate connection lines to be connected to a reference voltage line and also connected to intermediat points of polycrystal silicon. CONSTITUTION:To both ends of connection lines 8a, 8c..., and 8b, 8d... of polycrystal siliconw hcih constitutes one MOSFET 2 and one electrode of an MOS capacitor 3 forming a memory cell 1, couples of reference lines 7a and 7b, and 7c and 7d are connected respectively. When >1 intermediate lines 18a and 18b, etc., are provided between theose couples of reference lines 7a and 7b, and 7c and 7d, the connection lines 8a, 8c..., and 8b, 8d... having high impedance when those intermediate lines 18a and 18b are not provided have low impedance at their nodes 17.... Therefore, variation in voltage at the electrode of the MOS capacitor with variation in the voltage of a P type silicon substrate is reduced to obtain a semiconductor storage device which has less malfunction. |
