发明名称 GATE TURN-OFF THYRISTOR WITH INSULATED GATE
摘要 PURPOSE:To prevent the device destruction at the turn-off time by providing secondary diffusion layers suppressing the thyristor operation under the second emitter layer. CONSTITUTION:As the secondary diffusion layers for suppressing the thyristor operation, a there are formed p<+> type layer 101 which was diffused and formed from the surface of a second base layer 3 so as to cover part of a second emitter layer 4 and a p<+> type layer 102 which was buried in a main region which is to form a main junction between the second base layer 3 and a first base layer 2. With this, the current flowing at the ON time becomes uneven over the whole device and is limited to the MOS transistor region and the neighborhood thereof. As a result, the current concentration at the turn-off time is mitigated.
申请公布号 JPS63211675(A) 申请公布日期 1988.09.02
申请号 JP19870043563 申请日期 1987.02.26
申请人 TOSHIBA CORP 发明人 NAKAGAWA AKIO
分类号 H01L29/10;H01L29/74;H01L29/744;H01L29/749 主分类号 H01L29/10
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