| 摘要 |
PURPOSE:To obtain a high performance 2 DEGFET, in which resistance values between a source electrode and a gate electrode and between a drain electrode and the gate electrode are sufficiently decreased, by specifying the thickness of a resistance decreasing semiconductor layer, and making only a region, where the source electrode and the drain electrode are formed, thin. CONSTITUTION:The thickness of a resistance decreasing third semiconductor layer 5a is made to be 1,000-1,500Angstrom . Only a region, where a source electrode and a drain electrode are formed, is thinly formed. When the thickness (d) of the n-type GaAs layer 5a is thin, the resistance value R1 of the n-type GaAs layer 5a becomes large. When the thickness (d) of the n-type GaAs layer 5a becomes too thick, the lateral width of a recess groove 9 increases with said increased thickness, and a resistance value R3 becomes large. In consideration of these conditions, the resistance value RS(d)/RS(d=500Angstrom ), i.e., the resistance value RS, becomes the minimum value when the thickness (d) of the GaAs layer 5a is d=1,000-1,500Angstrom . |
