| 摘要 |
PURPOSE:To reduce the number of multiplications to improve the operation speed, by controlling multiplications in accordance with the result of the one-bit shift of integral exponent data to the least significant digit in a power calculating device where the multiplication process is controlled by integral exponent data. CONSTITUTION:Data in the third register GRO is shifted to lower digits by one bit until the value of integral exponent data becomes zero, and the square of data of the first register FRO or the product between data of the first register FRO and data of the second register FR2 is generated on a basis of the shifted- out value, and the operated value of the square of data is returned to the first register FRO, and the operated value of the product between data of first and second registers FRO and FR2 is returned to the second register FR2, and these operation processes are executed independently of exponent data. Consequently, the number of multiplications is reduced exponential-functionally, and a high- speed operation is realized. |
