发明名称 INSULATING GATE TYPE ELECTROSTATIC INDUCTION TRANSISTOR AND MANUFACTURE THEREOF
摘要 PURPOSE:To obtain the same effect as a short channel without increasing the junction area of source and drain electrode regions by additionally forming shallow low impurity concentration regions, which each contact with the drain region and the source region and are projected to the gate electrode side, previously into a channel region forming the MIS-SIT. CONSTITUTION:An P<+> type drain region 11 and source region 12 are diffused and shaped to an N type Si substrate 10, the whole surface is coated with an oxide film 14 and openings are bored, and a drain electrode 1 is formed to the region 11 and a source electrode 2 to the region 12. An opening is also bored to the film 14 positioned between the regions 11, 12, and the gate electrode 3 is shaped to the opening through a gate oxide film 4, thus forming the MIS-SIT. In this constitution, the shallow N<-> type additional region 15 is anew formed at the electrode 3 side of the region 11 additionally in projecting shape, and the shallow N<-> type additional region 25 is also formed similarly at the electrode 3 side of the region 12. Accordingly, the additional regions of low impurity concentration are shaped into the channel region, the channel region is easily depleted and junction capacitance is decreased.
申请公布号 JPS57211277(A) 申请公布日期 1982.12.25
申请号 JP19810097189 申请日期 1981.06.23
申请人 DAINI SEIKOSHA KK 发明人 SHINPO MASAFUMI
分类号 H01L29/78;H01L29/80 主分类号 H01L29/78
代理机构 代理人
主权项
地址