发明名称 DIGITAL PHASE SHIFTING CIRCUIT
摘要 PURPOSE:To always keep the relation of phase of two outputs constant, by providing an AND gate and a D type FF inputting an output of both FFs and a clock signal, in a phase shifting circuit in which outputs of the two FFs have phase difference of 90 deg.. CONSTITUTION:An input signal (a) is applied to an FF1 and also an FF2 via an inverting circuit 3. The output of the FFs 1 and 2 is changed at the leading of an input clock and a D-FF4 inputs the output of the FFs 1 and 2, an output of an AND gate 5 to which an input clock is inputted and the output of the circuit 3 and is operated at the rise of the clock and resets the FFs 1 and 2. The reset can be made by using a monostable multivibrator in place of the D-FF4. Thus, even if a phase shifting circuit is operated in the phase relation in error at the application of power supply, the reset is made to a desired phase relation at all times, allowing to keep the phase relation of the output at terminals (b) and (c) always constant.
申请公布号 JPS57210722(A) 申请公布日期 1982.12.24
申请号 JP19810095195 申请日期 1981.06.22
申请人 NIPPON DENKI KK 发明人 ISOE YASUHITO
分类号 H03K5/15;(IPC1-7):03K5/15 主分类号 H03K5/15
代理机构 代理人
主权项
地址