发明名称 |
Hysteresis circuit. |
摘要 |
<p>A differential pair of first and second transistors (Q10, Q11) for voltage comparison is provided, and a bias circuit (R12, R13) for setting a reference voltage is connected to the base of the second transistor. A differential pair of third and fourth transistors (Q12, Q13) is provided for reference voltage switching. The third and fourth transistors have their bases connected to the collectors of the first and second transistors and their collectors connected to the bias circuit in a positive feedback relation with respect to the base of the first transistor.</p> |
申请公布号 |
EP0067441(A2) |
申请公布日期 |
1982.12.22 |
申请号 |
EP19820105201 |
申请日期 |
1982.06.14 |
申请人 |
TOKYO SHIBAURA DENKI KABUSHIKI KAISHA |
发明人 |
KUSAKABE, HIROMI;YOSHIDA, YOSHIHIRO |
分类号 |
H03K3/0233;H03K3/023;H03K3/2897;(IPC1-7):03K3/295 |
主分类号 |
H03K3/0233 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|