MEMORY ACCESS DEVICE IN VECTOR PROCESSOR SYSTEM

摘要

PURPOSE:To obtain the mechanism for a data bus and a switching circuit with high speed and economical capabilities, by locating the switching circuit at the bidirectional bus memory side. CONSTITUTION:A bidirectional bus 31 is connected exclusively for an access pipeline unit 9(A) and a bidirectional bus 32 is provided exclusively for an access pipeline unit 1U(B). THe connection control for a switching circuit 33 is made with a pipeline control section 42 of a memory control unit 5. The control section 42 is provided with shift registers (A) and (B) storing control information corresponding to the access pipelines (A) and (B). The shift registers (A) and (B) are driven with a clock, the control information is outputted at the position of timing corresponding to the location of digit where the control information is stored and control signals required in the memory control unit as well as a connection instructing signal to a switching circuit 33 can be supplied via a decoder.