发明名称 DEFECT AND TROUBLE RELIEVING SYSTEM FOR STORAGE DEVICE
摘要 PURPOSE:To improve both the yield and the reliability of a storage device, by relieving a defect caused when the storage device is produced as well as a fault caused by an external factor and when the storage device is active. CONSTITUTION:An address selecting circuit 1B in a storing circuit 15B has a trouble, and a row line having a row address of ''01'' is selected by both row address signals ''00'' and ''01''. In such case, both a storage cell having an address ''0000'' contained in a storing circuit 15A and a memory cell having an address ''0100'' contained in the circuit 15B are selcted at one time. In this case, a discriminating circuit 13B in the circuit 15B detects a fault selected double, and the output signal SCB is set in the selection mode of fault. Thus a data input/output circuit group 14B is not started. Accordingly the writing/reading of data is carried out only to a cell having an address ''0000'' contained in the circuit 15A.
申请公布号 JPS57208692(A) 申请公布日期 1982.12.21
申请号 JP19810092785 申请日期 1981.06.16
申请人 NIPPON DENSHIN DENWA KOSHA 发明人 MINAGAWA CHIYOUZABUROU;UEOKA YASUSHIGE;ITOU HIROO
分类号 G06F12/16;G11C29/02 主分类号 G06F12/16
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