发明名称 CLOCK REPRODUCING CIRCUIT
摘要 PURPOSE:To obtain a clock signal with accurate and sufficient amplitude at the 2nd clock part, by suppressing an oscilltion of a ringing amplifier, before the 2nd character broadcast signal is incoming. CONSTITUTION:From a video signal multiplexed with a character broadcast signal applied to a terminal 21, only a signal for a burst clock part is picked up at an amplifier 23 by a gate pulse applied to a terminal 24. This clock signal has a basic frequency about a half the frequency of a transmission rate of a character broadcast signal, and a sampling clock is obtained by multiplying the signal. A signal from the amplifier 23 is applied to a ringing amplifier 26 and outputted via a buffer amplifier 28 as a continuous wave, wherein the oscillation energy of a quartz oscillator 27 is attenuated by applying an output of the buffer amplifier 28 to the ringing amplifier 26 via a phase inverting amplifier 31 just before the clock part is applied.
申请公布号 JPS57208779(A) 申请公布日期 1982.12.21
申请号 JP19810093498 申请日期 1981.06.17
申请人 SONY KK 发明人 YABE TOYOJI;ISONO KATSUO
分类号 H04N7/083;H04N7/035;H04N7/087;H04N7/088 主分类号 H04N7/083
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