| 摘要 |
PURPOSE:To simplify the circuit constitution and to perform accurate demodulation, by demodulating next original data as inverse data from a preceding original data, if a signal inversion interval bridges over a bit cell of the first half of the preceding original data. CONSTITUTION:A clock pulse having a period a half or lower than that of an original digital signal before conversion to two-phase signal is generated from a pulse generating circuit and applied to a counter via a logical circuit taking a reception data A as an input. The counter 7 starts count of the clock pulse of the circuit 2 from the latter half bit cell of the original signal and measures the signal inverting interval of the digital signal converted into the two phase signal. An output differentiating the leading and trailing of the signal A is applied to a terminal R of the counter 7 via an OR gate 10. Every time a value in which the inversion interval bridges over the 1st half bit of the original signal, a JK FF circuit 11 is inverted, and before the counter 7 counts the value of the 1st half bit after the start of count, an output of the circuit 11 is read out for accurate demodulation. |
