| 摘要 |
PURPOSE:To stop the clock based on the state of output of an optional circuit in a system, by adding a simple circuit including a flip-flop which designates the clock stop mode. CONSTITUTION:The logical blocks 1-1-1-3 contain the flip-flops 10-12 and a multiplexer 14. A multiplexer 3 selects either one of several kinds of scan-out information which are delivered from the blocks 1-1-1-3 in accordance with the upper address part on a scan address register 2. An EOR circuit 7 compares the output of the multiplexer 3 with the contents of a flip-flop 5 for setting of conditions, and then delivers ''1'' when the coincidence is obtained from the comparison. A flip-flop 6 designates whether the clock is stopped or not by the conditional comparison. When the output of an AND circuit 8 is set at ''1'', a clock control circuit 9 stops the clock of the system. |
