| 摘要 |
PURPOSE:To make the data transmission high-speed, by providing a clock in each of devices between devices where data is transmitted and using this clock effectively. CONSTITUTION:In a controller by which data is transmitted between computers through process input/output devices, clocks CL for synchronization of interposed process input/output devices are provided in respective stations. When data is transmitted from a transmitting station CPU1' to a receiving station CPU2', the CPU1' transmits a read command by a pulse D and starts a clock CL1 of its own station, and a clock CL2 of the receiving station side is started after a certain time from this clock start. The CPU1' outputs data and the parity by a pulse A' synchronously with the clock CL1 of its own station and transmits a transmission end signal by a pulse E after the transmission of data and the parity, and the CPU2' transmits a read end signal by a pulse F is received data is not abnormal, thus terminating a series of data transmissions. |
