| 摘要 |
PURPOSE:To prevent a reduction of output pulse duration, by discontinuing a continuous clock signal by means of an NOR circuit and by the selecting signal, at the same time supplying the single-shot clock generation indicating signal to the NOR circuit and producing the single-shot clock signals with the same phase and synchronously with the continuous clock signal. CONSTITUTION:When a single-shot clock generation indicating signal 2 and a selecting signal 3 are at a low level, respectively, the output of an NOR circuit N4 is set at a low level. The output of an NOR circuit N5 is set at a low level since the output Q' of a flip-flop 4 is set at a high level. As a result, the output of an NOR circuit N6 is set at a low level to obtain a continuous clock signal from an output 12. When the signal 3 is set at a high level, the output of the N5 is set at a low level. Then the output of the N6 is set at a high level to discontinue the output 12. When the signal 2 is set at a high level, the output of the N5 is set at a high level for a clock period. Thus a single-shot pulse is obtained at the output 12. |
