| 摘要 |
PURPOSE:To automatically detect a runaway of a microprocessor, and to prevent the runaway by providing an instruction fetching program with a parity bit and a fetch bit, and performing processing on detecting those bits. CONSTITUTION:Unit instructions consist of instruction fetching programs FPGA, B-, and execution programs A1, B1-; the FPG is provided with a parity bit P and a fetch bit FB1, and the execution PG is provided with a bit P and an FBO. When a parity error detector 2 detects a parity error in a program read out of a memory 1, an FB detector 3 reads the FB. A discriminator 4, when deciding that the FB is 1, decreases the numeral in a program counter 7 by one to stop the decoding operation of an instruction decoder 5, and reads the same instruction out of the memory 1 again. When deciding that the FB is O, on the other hand, the discriminator 4 operates a resetting circuit 6 to execute the program from the beginning. |
