发明名称 RATIO TYPE GATE CIRCUIT WITH POWER DOWN FUNCTION
摘要 PURPOSE:To prevent the level of a gate output from dropping by connecting MOS transistors (TRs) for separating an electric power source between a driving circuit and load MOS TRS and driving the driving circuit through MOS TRs inputting power voltage as a gate input. CONSTITUTION:MOS TRs 23, 24 for electric source separation are connected between a driving circuit consisting of MOS TRs 25-33 and load MOS TRs 21, 22 and the driving circuit is driven through the TRs 25, 26 inputting power voltage Vcc as a gate input. When an input IN is turned to a low level and the TR27 is turned off, a node P rises up to voltage Vcc because a node Q exceeds the voltage Vcc by the gate capacitance coupling of the TR23. The same is applied to a node S and, even if the TR for separating the electric power source is connected, gate outputs from push-pull TRs 31, 32 are prevented from level reduction, the working speed is increased and the operating margin of the electric power source is improved.
申请公布号 JPS57203287(A) 申请公布日期 1982.12.13
申请号 JP19810088990 申请日期 1981.06.10
申请人 NIPPON DENKI KK 发明人 KAMATANI MICHITOKU
分类号 G11C11/41;G11C5/14;G11C11/413 主分类号 G11C11/41
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