| 摘要 |
PURPOSE:To facilitate the designing of master slice type semiconductor device by a method wherein the device is constituted of depletion type IGFET's of plural number of pieces for load having nearly the same load current, and of elements of integer time of pieces for driving consisting of enchancement type IGFET's having nearly the same gate length and gate width therewith. CONSTITUTION:The depletion type IGFET element 61 of plural number of pieces having nearly the same load current are connected in series as the load element, and sources or drains thereof are connected to an electric power source VDD. Then the elements 62 for driving are connected to the drains of sources and gates of the group of elements 61 to constitute the master slice type inverter, while at this time, the elements 62 are constitutied of the enhancement type IGFET's consisting of the elements connected in parallel being the same number with the group of the elements 61 connected in parallel. Moreover the number thereof is constituted of the group of the integer time of pieces of the groups of the elements 61, gate length and gate width are made as the same with the elements 61, and those are connected to the GND. Accordingly, the sufficient operational margin is ensured. |
