摘要 |
An electrical network which is constructed from discrete parallelepiped chip components and in the case of which the chip component, that is to say the chip resistors (R), the chip capacitors (C) and/or the chip inductances (L) are arranged with their main surfaces on one another, are spaced apart from one another by parallelepiped chip components (1, 2, 3) and are mechanically firmly connected to one another. In this case, the chip components (R, C, L, 1, 2, 3) are arranged with their main surfaces on one another in such a manner that the metallised end surfaces (12, 32, 42) of the chip components (I, C, L, R) span a common plane which corresponds to the plane of a hybrid circuit. <IMAGE>
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申请人 |
DRALORIC ELECTRONIC GMBH, 8672 SELB, DE |
发明人 |
FINK, RUDOLF, DIPL.-ING., 8672 SELB, DE |