发明名称 |
Microinstruction substitution mechanism in a control store. |
摘要 |
<p>A microinstruction control storage mechanism includes a read-only store (ROS), writeable control store (WCS), first cycle control store, and a reserved portion of main storage in a data processing system. As required, blocks of microinstructions are paged into the WCS from the main storage. An array of single-bit storage devices, accessed by microinstruction addresses utilized to access microinstructions from the ROS, signal the existence of a faulty microinstruction from the ROS as determined by maintenance or design personnel. In response to a halt signal from an accessed single-bit storage device, an address substitution mechanism creates a microinstruction address which identifies a main storage location and may have to be used to initiate transfer of a block of microinstructions from main storage to the WCS to provide access to a particular substitute microinstruction for the faulty microinstruction.</p> |
申请公布号 |
EP0066084(A1) |
申请公布日期 |
1982.12.08 |
申请号 |
EP19820103548 |
申请日期 |
1982.04.27 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
JOHNSON, LANCE HERMAN;KISELAK, II, JOHN ANTHONY;NADARZYNSKI, EDWARD ALEXANDER;PEDERSEN, RAYMOND JAMES |
分类号 |
G06F9/22;G06F9/06;G06F9/26;(IPC1-7):06F9/26 |
主分类号 |
G06F9/22 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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