| 摘要 |
PURPOSE:To reduce the channel series resistance by means of making the low specific resistance layer approach the PN junction region as near as possible by a method wherein the P type semiconductor layer followed by the resist mask is utilized as the mask for the ion injection. CONSTITUTION:The high specific resistance buffer layer 8 is formed on the semiinsulating substrate 1 while the N type GaAs operating layer 2 and the N<+> type high concentration regions 61, 62 concentrating the layer 2 from both sides are formed on said layer 8. Then the source electrode 4, drain electrode 5, P type gate region 9 and gate elctrode 3 are formed on the surface of the regions 61, 62. The region 9 is formed into the inverse rack type and when the low specific resistance layers 61, 62 are formed into he source, drain regions by means of the ion injection, the mask followed by the layer 9 is utilized. Moreover, each electrode of the source 4, gate 3 and drain 5 may be formed by means of the self alignment to minimize the parasitic element resistance making use of the inverse rack type. |
