| 摘要 |
PURPOSE:To reduce a processing time and the memory capacity of a storage circuit, by smoothing a sampling value of an analog signal and digitizing this smoothed value. CONSTITUTION:An analog signal 1 is inputted to a sample holding circuit S/H2 and the peak value is stored at each clock 5. Simultaneously, this stored value is synchronized with the clock 5 and stored at S/H circuits 3 and 4 sequentially. As a result, the holding value of the analog signal peak value in time series to be obtained is given to an analog average circuit 7 and smoothed. Next, the smoothed holding value is converted at an A/D converter 10 and stored in a storage circuit 11. Thus, since a digital smooth value can be obtained in on-line to the analog signal, the reduction of the processing time and the memory capacity of the storage circuit can be achieved. |
