发明名称 FLASH ELECTRICALLY ERASABLE PROGRAMMABLE ROM AND ERASING METHOD THEREOF
摘要 <p>PURPOSE: To realize an erase operation with a lower voltage and higher accuracy and in a small erase unit by performing a first write back operation to eliminate a memory cell overerased and a second write back operation to compress variations in threshold voltage sequentially. CONSTITUTION: An address generation circuit 1505 generates an address for a writing, erasing or writing back operation. A selector prewriting circuit 1504 performs a prewriting per word line and an automatic deletion control circuit 1502 performs an erasing operation. A write back control circuit 1511 detects a data line where a memory cell suffering an excessive deletion to a negative threshold voltage exists to accomplish a writing operation at a potential reduced in terms of an absolute value with respect to the writing operation and detects a memory cell which has been overerased to a small threshold voltage to accomplish a writing operation at the same potential sequentially. This enables the securing of a wide temperature guaranteeing range thereby realizing an erase suspending function during the period other than the period during which a first writing back is completed from the starting of the erasing operation.</p>
申请公布号 JPH08106793(A) 申请公布日期 1996.04.23
申请号 JP19940261228 申请日期 1994.09.30
申请人 HITACHI LTD;HITACHI VLSI ENG CORP;HITACHI MICROCOMPUT SYST LTD 发明人 TAKAHASHI MASATO;FURUNO TAKESHI;WADA MASASHI;KOSAKAI KENJI;KAMEYAMA HIDEAKI
分类号 G11C17/00;G11C16/02;G11C16/06;(IPC1-7):G11C16/06 主分类号 G11C17/00
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