发明名称 MULTIPLEX CONTROLLING SYSTEM FOR FILE MEMORY
摘要 PURPOSE:To increase the reliability of a file memory, by processing from a plurality of memory units via a file memory control connected to individual buses. CONSTITUTION:A CPU 1 decides whether or not an access address exists in a plurality of memory units 2 and 3, and after the same information is written in all the memory units where the access address exists, the same information of te same address is read out from a plurality of memory units and written in a plurality of file memories 6 and 7 via individual buses 10 and 11 and file memory controllers 4 and 5 connected to the buses.
申请公布号 JPS57197661(A) 申请公布日期 1982.12.03
申请号 JP19810082282 申请日期 1981.05.29
申请人 NIPPON DENSHIN DENWA KOSHA 发明人 FUKUOKA HIDEKI;TANAKA KIYOTO
分类号 G06F12/16;G06F3/06;G06F12/06 主分类号 G06F12/16
代理机构 代理人
主权项
地址