| 摘要 |
Method for demodulating FSK signals in which zero crossings of the FSK signals are detected and processed further. A FSK demodulator including an address-generating logic and a memory connected to the address-generating logic. The FSK signals are delivered to the input side of and control the address-generating logic. At a system clock frequency, the necessary address sequence is supplied to the memory for reading out a pulse reply from the memory for each zero-crossing of the FSK signal. In the memory are stored time-sequential values of a pulse reply having a given duration which emulate the output of a digital non-recursive transversal filter having lowpass transfer characteristic upon an input pulse of given duration. The address generating logic supplies a definite counting address to each zero crossing on the input side which is not yet assigned to another zero crossing. The counting address sequentially assumes all sequence values for the given duration which are necessary for reading out the pulse reply from the memory and which last sequence value assumes a rest value after the completion of the read out process. Data read out from the memory during a given system clock period is summed up. |
