发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND MANUFACTURE THEREOF
摘要 PURPOSE:To improve the workability by means of making the interfacial characteristics excellent, enabling the direct contact and preventing the step disconnection and the like by a method wherein the laminated layer and the high melting point metal are respectively extended to be the wiring layer on the thin insulating layer and the thick insulating layer. CONSTITUTION:For example each gate electrode of MISFET Q1, Q2, Q3 are formed into the two layered lamination comprising the multilayers and the molybdenum layers 10, 8, 9 extended on the field SiO2 film 2 as the upper layers. On the other hand, in the FET Q3, the direct contact element with the N<+> type diffused region 20 through the through hole CH1 is formed into the two layered lamination comprising the multicrystal silicon layer 6 and the molybdenum layer 9. The formation is similar to the N<+> type diffused region 21 in the FET Q1 while the wiring 8, 9, 10 comprise the molybdenum layer only extended from the respective gate electrode.
申请公布号 JPS57194582(A) 申请公布日期 1982.11.30
申请号 JP19810079209 申请日期 1981.05.27
申请人 HITACHI SEISAKUSHO KK 发明人 KOYANAGI MITSUMASA;HAYASHIDA TETSUYA;YAMAMOTO NAOKI
分类号 H01L21/3205;H01L23/52;H01L29/78 主分类号 H01L21/3205
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