| 摘要 |
PURPOSE:To enhance the speed and to save the power consumption of a semiconductor memory by forming a groove formed on the main surface of a substrate, and a capacitor in which an insulating film, a conductor layer are laminated in a direction parallel to the side of the groove to the depth on the way to the groove, and providing a conductor layer which becomes a gate electrode of a transfer transistor on a multilayer structure. CONSTITUTION:A semiconductor region 11 as a second conductor layer including a p-type impurity connected to a p-type silicon substrate 10 becomes a cell plate of one electrode of a capacitor, and a semiconductor region 12 as a first conductor layer including an n-type impurity becomes the other electrode of the capacitor. Memory cells are disposed at the crossing region of a bit line 18 and a word line 15, and a gate region 14 which is commonly used for two transfer transistors is limited to a region 21 to be formed. Since a region formed with the electrode 14 is limited to the region 21, the overlapping area of the gate electrode 14 and the substrate 10 can be reduced. As a result, a word line capacity can be reduced to enhance the speed and to save the power consumption. |
