| 摘要 |
PURPOSE:To enable the generation of a complte test pattern of a logic IC formed of a plurality of NOR gates using an input in common partially, by replacing the NOR gates by NOT gates and AND gates. CONSTITUTION:NOR gates G1 and G2 of a circuit formed of NOR circuits G1, G2, etc. which are formed of transistors T1, T4, T6, and T2, T5 are replaced by an AND gate G11 and NOT gates G12, G19, and by an AND gate G21 and NOT gates G22, G23, etc. Thereby a complete test pattern can be generated, while detection equivalent to the missing and imperfection of the transistors T1 and T2 can be conducted thrugh the intermediary of the gates G12, G14, and G22, G23. |
